Races, missed next-state values due to long paths, and metastability can result from corrupted clock signals. This post describes the challenges of clock network and clock jitter analysis in more ...

Experienced designers of 10 Gbits/sec (10G) Ethernet, SONET/OTN, Infiniband (QDR/FDR), and Fibre channel (16/8GFC) products are well aware that the maintenance of signal quality is far more difficult ...

Maintaining the quality and reliability of electrical signals as they travel through interconnects is proving to be much more challenging with chiplets and advanced packaging than in monolithic SoCs ...

The relentless pursuit of higher performance and greater functionality has propelled the semiconductor industry through several transformative eras. The most recent shift is from traditional ...