Fault simulation, one of the oldest tools in the EDA industry toolbox, is receiving a serious facelift after it almost faded from existence. In the early days, fault simulation was used to grade the ...

This is the second part of a two-part discussion (Part 1 appeared in August) in which the author considers fault-coverage analysis and simulation for full-scan testing of ASIC designs. These elements ...

Once IC fabrication is complete, engineers use fault models to create test patterns that detect defects. These fault models are typically abstractions of defect behavior based on our experience and ...