EDN

Ultra-Thin Molded Chip Scale Package

Alpha and Omega Semiconductor Limited released a family of low on-resistance 8V, 20V, and 30V MOSFETs in the ultra-thin molded chip scale package (MCSP). The MCSP devices feature a maximum height of ...
Semiconductor Engineering

High Performance, Multi-Chip Leadframe Package With Internal Connections

For high performance applications, demand for highly integrated packages has increased. This is due to the highly integrated package’s electrical performance advantages of reduction of interchip ...
Electronic Design

Microchip Expands UNI/O EEPROM Line With Wafer-Level Chip-Scale And TO-92 Packages

Microchip has developed a single-I/O bus UNI/O EEPROM devices in miniature, wafer-level chip-scale and TO-92 packages, in addition to the 3-pin SOT-23 package. Measuring 0.85 mm x 1.38 mm, the ...
Electronic Design

Low-Power Microprocessor Supervisory Circuits in Chip-Scale Package

Maxim Integrated Products introduces the MAX16072-MAX16074 microprocessor supervisory circuits in a 1mm x 1mm chip-scale package Maxim Integrated Products introduces the MAX16072-MAX16074 ...
Semiconductor Engineering

A Hybrid PLP Technology Based On A 650mm x 650mm Platform

A panel-level (PL) approach to fan-out (FO) packaging has been discussed for several years to reduce the cost of chip-first FO packaging based on redistribution layer (RDL) technology. More recently, ...
EDN

Wafer-scale chip claims to offer GPU alternative for AI models

Wafer-scale technology is making waves again, this time promising to enable artificial intelligence (AI) models with trillions of parameters to run faster and more efficiently than traditional ...